Intel talks about Yonah and Merom at IDF

Posted on Wednesday, October 19 2005 @ 10:02 CEST by Thomas De Maesschalck
At the Intel Developer Forum in Taipei, Intel has been discussing the next-generation 65nm Yonah and Merom processors.
Intel intends to launch Merom as pin-to-pin compatible with Yonah, Iden mentioned, so Napa systems are expected to be upgradeable through inserting a new processor and a BIOS upgrade. Announced at IDF Taiwan, preliminary specifications of Yonah are following: 65nm technology, 151 million transistors (12.3 million in cores), 2MB of level-two cache shared between two cores and dynamically allocated, 667MHz front-side bus (FSB), PGA478 or BGA479 socket. In addition to dual-core Yonah and Merom, the company has already started thinking about mobile processors with four and more cores, Iden said.
More info over at DigiTimes.

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