Intel's Tulsa wafer exposed

Posted on Thursday, November 10 2005 @ 0:36 CET by Thomas De Maesschalck
VR-Zone writes Intel is on track to launch the 65nm Tulsa dual-core Xeon MP processor in the second half of 2006. This processor will feature 16MB L3 cache along with 2x 1MB L2 cache and will be part of the Truland platform that features Virtualization Technology and Pellston Technology.

Pellston Technology is a technology to disable parts of the memory cache that give too many ECC errors.

This processor will be branded as the Intel Xeon 7000 series and VR-Zone has published an exclusive photo of how the Tulsa die will look like.

You can check out the photo over here.

In 2007 the Tulsa will be replaced by the quad-core Tigerton, featuring dedicated high-speed interconnect between the chipset and the individual cores.

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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